例句與造句

1. A modulus that takes the overflow bits and mixes them into the lower bits provides better error detection.
2. The computer had 2048 words of erasable magnetic core memory and 36 overflow bit, and one sign bit ( ones'complement representation ).
3. Obviously great care must be used in the device driver and the associated system design, as spurious assertion of the overflow bit could ruin arithmetic processing.
4. The " SO " input pin, when asserted, will set the processor's overflow status bit ( deasserting it does not clear the overflow bit, however ).
5. A variant of the previous algorithm is to add all the " words " as unsigned binary numbers, discarding any overflow bits, and append the two's complement of the total as the checksum.
6. It's difficult to find overflow bit in a sentence. 用overflow bit造句挺難的
7. For example, MIPS has no " overflow bit " but a program performing multiple-word addition can test whether a single-word addition of registers overflowed by testing whether the sum is lower than an operand:
8. Saturation arithmetic also enables overflow of additions and multiplications to be detected consistently without an overflow bit or excessive computation, by simple comparison with the maximum or minimum value ( provided the datum is not permitted to take on these values ).
9. The PDP-12 was the last and most popular follow-on to the LINC . It was a capable and improved machine, and was more stable than the LINC-8, but architecturally was still an imperfect hybrid of a LINC and a PDP-8, full of many small technical glitches . ( For example, the LINC had an overflow bit which was a small but important part of the LINC's machine state; the PDP-12 had no provision for saving and restoring the state of this bit across PDP-8 interrupts .)
10. Because the desired transfer speeds were faster even than could tolerate the minimum four-operation per-datum loop ( bit-test, conditional-branch-to-self, fetch, and store ), the hardware would often be built with automatic wait state generation on the I / O device, pushing the data ready poll out of software and onto the processor's fetch or store hardware and reducing the programmed loop to two operations . ( In effect using the processor itself as a DMA engine . ) The 6502 processor offered an unusual means to provide a three-element per-datum loop, as it had a hardware pin that, when asserted, would cause the processor's Overflow bit to be set directly . ( Obviously one would have to take great care in the hardware design to avoid overriding the Overflow bit outside of the device driver !)
11. Because the desired transfer speeds were faster even than could tolerate the minimum four-operation per-datum loop ( bit-test, conditional-branch-to-self, fetch, and store ), the hardware would often be built with automatic wait state generation on the I / O device, pushing the data ready poll out of software and onto the processor's fetch or store hardware and reducing the programmed loop to two operations . ( In effect using the processor itself as a DMA engine . ) The 6502 processor offered an unusual means to provide a three-element per-datum loop, as it had a hardware pin that, when asserted, would cause the processor's Overflow bit to be set directly . ( Obviously one would have to take great care in the hardware design to avoid overriding the Overflow bit outside of the device driver !)